IPP@ HDL: Efficient intellectual property protection scheme for IP cores E Castillo, U Meyer-Baese, A Garcia, L Parrilla, A Lloris IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (5), 578-591, 2007 | 155 | 2007 |
Ring oscillators as thermal sensors in FPGAs: Experiments in low voltage JJL Franco, E Boemo, E Castillo, L Parrilla 2010 VI Southern Programmable Logic Conference (SPL), 133-137, 2010 | 78 | 2010 |
Efficient wavelet-based ECG processing for single-lead FHR extraction E Castillo, DP Morales, G Botella, A Garcia, L Parrilla, AJ Palma Digital Signal Processing 23 (6), 1897-1909, 2013 | 74 | 2013 |
Noise Suppression in ECG Signals through Efficient One‐Step Wavelet Processing Techniques E Castillo, DP Morales, A García, F Martínez-Martí, L Parrilla, AJ Palma Journal of Applied Mathematics 2013 (1), 763903, 2013 | 71 | 2013 |
RNS-FPL merged architectures for orthogonal DWT J Ramírez, A García, PG Fernández, L Parrilla, A Lloris Electronics Letters 36 (14), 1198-1199, 2000 | 44 | 2000 |
A new architecture to compute the discrete cosine transform using the quadratic residue number system J Ramírez, A Garcia, PG Fernández, L Parrilla, A Lloris 2000 IEEE International Symposium on Circuits and Systems (ISCAS) 5, 321-324, 2000 | 41 | 2000 |
Automated signature insertion in combinational logic patterns for HDL IP core protection E Castillo, L Parrilla, A Garcia, U Meyer-Baese, G Botella, A Lloris 2008 4th Southern Conference on Programmable Logic, 183-186, 2008 | 40 | 2008 |
A clustering-based method for single-channel fetal heart rate monitoring E Castillo, DP Morales, A García, L Parrilla, VU Ruiz, JA Álvarez-Bermejo PLoS One 13 (6), e0199308, 2018 | 33 | 2018 |
An application of reconfigurable technologies for non-invasive fetal heart rate extraction DP Morales, A Garcia, E Castillo, MA Carvajal, L Parrilla, AJ Palma Medical Engineering & Physics 35 (7), 1005-1014, 2013 | 33 | 2013 |
Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF (2m) fields L Parrilla, A Lloris, E Castillo, A Garcia Electronics letters 48 (18), 1126-1128, 2012 | 31 | 2012 |
Integration of hardware security modules and permissioned blockchain in industrial iot networks AJ Cabrera-Gutiérrez, E Castillo, A Escobar-Molero, JA Álvarez-Bermejo, ... IEEE Access 10, 114331-114345, 2022 | 30 | 2022 |
Unified compact ECC-AES co-processor with group-key support for IoT devices in wireless sensor networks L Parrilla, E Castillo, JA López-Ramos, JA Álvarez-Bermejo, A García, ... Sensors 18 (1), 251, 2018 | 30 | 2018 |
A RNS-based matrix-vector-multiply FCT architecture for DCT computation PG Fernandez, A Garcia, J Ramirez, L Parrilla, A Lloris Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat …, 2000 | 27 | 2000 |
Elliptic curve cryptography hardware accelerator for high-performance secure servers L Parrilla, JA Álvarez-Bermejo, E Castillo, JA López-Ramos, ... The Journal of Supercomputing 75, 1107-1122, 2019 | 25 | 2019 |
Intellectual property protection (IPP) using obfuscation in C, VHDL, and verilog coding U Meyer-Bäse, E Castillo, G Botella, L Parrilla, A Garcia Independent Component Analyses, Wavelets, Neural Networks, Biosystems, and …, 2011 | 23 | 2011 |
Wearable system for biosignal acquisition and monitoring based on reconfigurable technologies V Toral, A García, FJ Romero, DP Morales, E Castillo, L Parrilla, ... Sensors 19 (7), 1590, 2019 | 19 | 2019 |
IPP watermarking technique for IP core protection on FPL devices E Castillo, L Parrilla, A Garcia, A Loris, U Meyer-Bäse 2006 International Conference on Field Programmable Logic and Applications, 1-6, 2006 | 19 | 2006 |
Sistemas digitales A Lloris Ruíz, A Prieto Espinosa, L Parrilla Roure Alberto Prieto Espinosa, Luis Parrilla Roure.-, 2003 | 19 | 2003 |
Towards project-based learning applied to the electronic engineering studies DP Morales, E Castillo, L Parrilla, A García, A Otín 2015 Conference on design of circuits and integrated systems (DCIS), 1-5, 2015 | 17 | 2015 |
Digital implementation of radial basis function neural networks based on stochastic computing A Morán, L Parrilla, M Roca, J Font-Rossello, E Isern, V Canals IEEE Journal on Emerging and Selected Topics in Circuits and Systems 13 (1 …, 2022 | 16 | 2022 |