A review of selected topics in physics based modeling for tunnel field-effect transistors D Esseni, M Pala, P Palestri, C Alper, T Rollo Semiconductor Science and Technology 32 (8), 083005, 2017 | 84 | 2017 |
Tunnel FETs for ultralow voltage digital VLSI circuits: Part I—Device–circuit interaction and evaluation at device level D Esseni, M Guglielmini, B Kapidani, T Rollo, M Alioto IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (12 …, 2014 | 73 | 2014 |
Essential physics of the OFF-state current in nanoscale MOSFETs and tunnel FETs D Esseni, MG Pala, T Rollo IEEE Transactions on Electron Devices 62 (9), 3084-3091, 2015 | 44 | 2015 |
Stabilization of negative capacitance in ferroelectric capacitors with and without a metal interlayer T Rollo, F Blanchini, G Giordano, R Specogna, D Esseni Nanoscale 12 (10), 6121-6129, 2020 | 43 | 2020 |
Influence of interface traps on ferroelectric NC-FETs T Rollo, D Esseni IEEE Electron Device Letters 39 (7), 1100-1103, 2018 | 30 | 2018 |
Energy minimization and Kirchhoff’s laws in negative capacitance ferroelectric capacitors and MOSFETs T Rollo, D Esseni IEEE Electron Device Letters 38 (6), 814-817, 2017 | 24 | 2017 |
New design perspective for ferroelectric NC-FETs T Rollo, D Esseni IEEE Electron Device Letters 39 (4), 603-606, 2018 | 20 | 2018 |
A simulation based study of NC-FETs design: Off-state versus on-state perspective T Rollo, H Wang, G Han, D Esseni 2018 IEEE International Electron Devices Meeting (IEDM), 9.5. 1-9.5. 4, 2018 | 19 | 2018 |
Revised analysis of negative capacitance in ferroelectric-insulator capacitors: analytical and numerical results, physical insight, comparison to experiments T Rollo, F Blanchini, G Giordano, R Specogna, D Esseni 2019 IEEE International Electron Devices Meeting (IEDM), 7.2. 1-7.2. 4, 2019 | 11 | 2019 |
Supersteep retrograde doping in ferroelectric MOSFETs for sub-60mV/dec subthreshold swing T Rollo, D Esseni 2016 46th European Solid-State Device Research Conference (ESSDERC), 360-363, 2016 | 8 | 2016 |
Variability and disturb sources in ferroelectric 3D NANDs and comparison to charge-trap equivalents M Pešić, A Padovani, T Rollo, B Beltrando, J Strand, P Agrawal, A Shluger, ... 2022 IEEE International Memory Workshop (IMW), 1-4, 2022 | 6 | 2022 |
Accurate and Efficient Dynamic Simulations of Ferroelectric Based Electron Devices T Rollo, L Daniel, D Esseni 2019 International Conference on Simulation of Semiconductor Processes and …, 2019 | 1 | 2019 |
Insights into device and material origins and physical mechanisms behind cross temperature in 3D NAND M Pesic, B Beltrando, T Rollo, C Zambelli, A Padovani, R Micheloni, ... 2023 IEEE International Reliability Physics Symposium (IRPS), 1-8, 2023 | | 2023 |
Impact of Poly-Si channel: Multiscale modeling insight from first-principles to device simulation R Maji, T Rollo, S Gangopadhyay, M Pesic, L Larcher, E Luppi, E Degoli, ... APS March Meeting Abstracts 2023, UU01. 007, 2023 | | 2023 |
Stabilization of negative capacitance in ferroelectric capacitors with and without a metal interlayer (vol 12, pg 6121, 2020) T Rollo, F Blanchini, G Giordano, R Specogna, D Esseni NANOSCALE 12 (22), 12177-12178, 2020 | | 2020 |
Ferroelectric Negative Capacitance Transistors as Beyond Tunnel-FETs, Steep-Slope Devices: a Modeling, Simulation and Design Study T Rollo Università degli Studi di Udine, 2019 | | 2019 |
New device concepts, transistor architectures and materials for high performance and energy efficient CMOS circuits in the forthcoming era of 3D integrated circuits D Esseni, O Badami, F Driussi, D Lizzit, M Pala, P Palestri, T Rollo, ... 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM …, 2018 | | 2018 |
New design perspective for Ferroelectric NC-FETs D ESSENI, T ROLLO | | |