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Xin Meng
Xin Meng
Oregon State University
Подтвержден адрес электронной почты в домене broadcom.com
Название
Процитировано
Процитировано
Год
Low-distortion wideband delta-sigma ADCs with shifted loop delays
X Meng, Y Zhang, T He, GC Temes
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (2), 376-384, 2014
192014
A passive CMOS low-pass filter for high speed and high SNDR applications
P Payandehnia, AF Yeknami, X Meng, C Yang, GC Temes
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 285-288, 2015
132015
A noise-coupled time-interleaved delta-sigma modulator with shifted loop delays
X Meng, Y Zhang, T He, P Payandehnia, GC Temes
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2045-2048, 2015
82015
A 16-bit 1KHz bandwidth micro-power multi-step incremental ADC for multi-channel sensor interface
T He, Y Zhang, X Meng, G Temes, C Chen
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1018-1021, 2015
82015
A 1 V 59 fJ/step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback
Y Zhang, CH Chen, T He, X Meng, N Qian, E Liu, P Elliott, GC Temes
2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 321-324, 2014
82014
A fully-differential input amplifier with band-pass filter for biosensors
X Meng, W Li, GC Temes
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 21-24, 2014
82014
Charge compensation technique for switched-capacitor circuits
X Meng, T Wang, GC Temes
Electronics letters 48 (16), 1, 2012
82012
Bootstrapping techniques for floating switches in switched-capacitor circuits
X Meng, GC Temes
2014 IEEE 57th International Midwest Symposium on Circuits and Systems …, 2014
72014
A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensation
Y Zhang, CH Chen, T He, X Meng, GC Temes
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 934-937, 2014
72014
6.1 A 112Gb/s serial link transceiver with 3-tap FFE and 18-tap DFE receiver for up to 43dB insertion loss channel in 7nm FinFET technology
B Zhang, A Vasani, A Sinha, A Nilchi, H Tong, L Rao, K Khanoyan, ...
2023 IEEE International Solid-State Circuits Conference (ISSCC), 5-7, 2023
62023
Power-on digital calibration method for delta-Sigma ADCs
J Cao, X Meng, GC Temes, W Yu
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2002-2005, 2016
62016
A noise-coupled low-distortion delta-sigma ADC with shifted loop delays
X Meng, Y Zhang, T He, GC Temes
2014 IEEE 57th International Midwest Symposium on Circuits and Systems …, 2014
52014
A new low-cost demodulator for 2.4 GHz ZigBee receivers
Y Yu, X Meng, S Xiao, C Ma, T Ye
Journal of Electronics (China) 26, 252-257, 2009
52009
Sequential interstage correlated double sampling: A switched-capacitor technique for high accuracy systems
P Payandehnia, H Maghami, X Meng, GC Temes, H Yoshizawa
2014 IEEE 57th International Midwest Symposium on Circuits and Systems …, 2014
42014
Double‐sampled wideband delta–sigma ADCs with shifted loop delays
X Meng, GC Temes
Electronics letters 50 (11), 794-795, 2014
42014
A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays
X Meng, J Cao, T He, Y Zhang, GC Temes, M Aniya, K Sobue, ...
ESSCIRC Conference 2015-41st European Solid-State Circuits Conference …, 2015
22015
Multi-step counting ADC
P Payandehnia, X Meng, GC Temes
2014 IEEE 57th International Midwest Symposium on Circuits and Systems …, 2014
22014
A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology
B Zhang, A Vasani, A Sinha, A Nilchi, H Tong, LP Rao, K Khanoyan, ...
IEEE Journal of Solid-State Circuits, 2023
12023
A low-power parasitic-insensitive switched-capacitor integrator for Delta-Sigma ADCs
X Meng, T Wang, GC Temes
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 986-989, 2014
12014
Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays
X Meng
2015
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Статьи 1–20