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Francesco Centurelli
Francesco Centurelli
Università di Roma La Sapienza
Подтвержден адрес электронной почты в домене uniroma1.it
Название
Процитировано
Процитировано
Год
Design solutions for sample-and-hold circuits in CMOS nanometer technologies
F Centurelli, P Monsurrò, S Pennisi, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 56 (6), 459-463, 2009
602009
Efficient digital background calibration of time-interleaved pipeline analog-to-digital converters
F Centurelli, P Monsurrò, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (7), 1373-1383, 2012
542012
Behavioral modeling for calibration of pipeline analog-to-digital converters
F Centurelli, P Monsurrò, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (6), 1255-1264, 2010
392010
A bootstrap technique for wideband amplifiers
F Centurelli, R Luzzi, M Olivieri, A Trifiletti
Circuits and Systems I: Fundamental Theory and Applications, IEEE …, 2002
342002
A bootstrap technique for wideband amplifiers
F Centurelli, R Luzzi, M Olivieri, A Trifiletti
MixDes 00 Int. Conf. on Mixed Design of Integrated Circuits and Systems, 383-386, 2000
342000
A Topology of Fully Differential Class-AB Symmetrical OTA With Improved CMRR
F Centurelli, P Monsurrò, G Parisi, P Tommasino, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (11), 1504-1508, 2018
302018
Low power DDA-based instrumentation amplifier for neural recording applications in 65 nm CMOS
M Avoli, F Centurelli, P Monsurrò, G Scotti, A Trifiletti
AEU-International Journal of Electronics and Communications 92, 30-35, 2018
302018
A class-AB flipped voltage follower output stage
F Centurelli, P Monsurrò, A Trifiletti
2011 20th European Conference on Circuit Theory and Design (ECCTD), 757-760, 2011
292011
A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier
F Centurelli, R Della Sala, G Scotti, A Trifiletti
Applied Sciences 11 (6), 2528, 2021
282021
Improved Digital Background Calibration of Time-Interleaved Pipeline A/D Converters
F Centurelli, P Monsurrò, A Trifiletti
Circuits and Systems II: Express Briefs, IEEE Transactions on 60 (2), 86-90, 2013
272013
A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate
F Centurelli, R Della Sala, P Monsurrò, G Scotti, A Trifiletti
Journal of Low Power Electronics and Applications 11 (2), 19, 2021
262021
0.6‐V CMOS cascode OTA with complementary gate‐driven gain‐boosting and forward body bias
D Cellucci, F Centurelli, V Di Stefano, P Monsurrò, S Pennisi, G Scotti, ...
International Journal of Circuit Theory and Applications 48 (1), 15-27, 2020
252020
Enabling ULV fully synthesizable analog circuits: The BA cell, a standard-cell-based building block for analog design
R Della Sala, F Centurelli, G Scotti
IEEE Transactions on Circuits and Systems II: Express Briefs 69 (12), 4689-4693, 2022
202022
A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers
F Centurelli, R Della Sala, P Monsurrò, G Scotti, A Trifiletti
Journal of Low Power Electronics and Applications 12 (1), 12, 2022
202022
Comparative performance analysis and complementary triode based CMFB circuits for fully differential class AB symmetrical OTAs with low power consumption
F Centurelli, P Monsurrò, A Trifiletti
International Journal of Circuit Theory and Applications 44 (5), 1039-1054, 2016
202016
Design and validation through a frequency-based metric of a new countermeasure to protect nanometer ICs from side-channel attacks
S Bongiovanni, F Centurelli, G Scotti, A Trifiletti
Journal of Cryptographic Engineering 5 (4), 269-288, 2015
202015
A Standard-Cell-Based CMFB for Fully Synthesizable OTAs
F Centurelli, R Della Sala, G Scotti
Journal of Low Power Electronics and Applications 12 (2), 27, 2022
182022
An Ultra-Low-Voltage class-AB OTA exploiting local CMFB and Body-to-Gate interface
F Centurelli, R Della Sala, P Monsurró, P Tommasino, A Trifiletti
AEU-International Journal of Electronics and Communications 145, 154081, 2022
182022
A 0.6 V class-AB rail-to-rail CMOS OTA exploiting threshold lowering
F Centurelli, P Monsurrò, G Parisi, P Tommasino, A Trifiletti
Electronics Letters 54 (15), 930-932, 2018
182018
A model for the distortion due to switch on-resistance in sample-and-hold circuits
F Centurelli, P Monsurrò, A Trifiletti
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International …, 2006
182006
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